Photolithography Explained: Contact Printing to DUV Immersion and Overlay

Photolithography is the step that copies a circuit pattern from a mask onto a silicon wafer using light and a light sensitive polymer called photoresist. A modern deep ultraviolet (DUV) immersion scanner shines 193 nm laser light through a 4x reduction lens and a thin film of water to print features far smaller than the wavelength, and every chip layer repeats the cycle.

This guide follows the method from the contact printers of the 1960s and 1970s to today's 1.35 NA immersion scanners. It covers the full process flow, the physics with worked numbers in Python, the resolution enhancement tricks that pushed optics past the textbook limit, multi-patterning, chemically amplified resists, masks, and the overlay and critical dimension (CD) control that decides whether a wafer yields. It closes with an honest note on where software supply chain hygiene fits inside a fab, because every scanner, track and metrology tool runs on a large software stack.

Key takeaways

• The cycle is the same at every layer. Coat, soft bake, expose, post exposure bake, develop, then etch or implant, then strip. A modern chip repeats it dozens of times, and each pass must land on the previous layers within a few nanometres.
• Resolution follows the Rayleigh criterion. ASML writes it as CD = k1·λ/NA and gives 0.25 as the physical limit of k1 for a single exposure. At 193 nm and NA 1.35 that works out to about 35.7 nm half pitch. ASML quotes production resolution of 38 nm with dipole illumination on the NXT:2000i, which implies k1 of about 0.27.
• Immersion broke the NA = 1 ceiling. A layer of water between the last lens element and the wafer lets the numerical aperture reach 1.35. ASML shipped its first immersion system in 2003, its first volume production immersion system in 2006 and its first NA 1.35 system in 2007.
• Depth of focus is the price. Paraxial depth of focus scales with λ/NA², so it shrinks faster than resolution improves. At the same NA, immersion buys back roughly 1.7 to 1.9 times the depth of focus of a dry system in the non paraxial model.
• Below about 76 nm pitch, one exposure is not enough. Litho etch litho etch (LELE) splits a layout across two masks. Self aligned double and quadruple patterning (SADP and SAQP) use spacers to halve or quarter the pitch, which is how 193 nm immersion reached metal pitches in the mid 20 nm range.
• Chemically amplified resists made deep ultraviolet practical. Developed at IBM by Ito, Willson and Fréchet, they use a photo generated acid that catalyses many deprotection reactions during the post exposure bake.
• Overlay is now measured in fractions of a nanometre. ASML states that the NXT:2100i improves single machine overlay by up to 10 percent to 0.9 nm and matched machine overlay by 13 percent to 1.3 nm.
• Safeguard does not design, program or speed up lithography hardware. The bridge is the software that runs a fab: tool control software, recipe and automation servers, analysis stacks and their open source dependencies.

What photolithography does, in one picture

A chip is built as a stack of patterned layers. Some layers define transistors, some define the contacts that reach them, and many more define the copper wires and vias above them. For each layer, the fab deposits or grows a film, then needs a stencil on top of that film that says "remove here, keep there" or "implant here, not there". Photolithography makes that stencil.

The stencil is photoresist, a polymer film that changes its solubility where light hits it. The pattern comes from a mask, also called a reticle, which is a quartz plate carrying the layer's design in an opaque or phase shifting film. A projection lens images the mask onto the resist, usually reduced four times. After development the resist pattern protects some of the film below during etch, and then the resist is stripped away. The pattern now lives permanently in the film.

            light source (193 nm ArF excimer laser)
                         |
                  illuminator (shapes the pupil:
                  conventional, annular, dipole, quad)
                         |
             +-----------------------+
             |   reticle (4x size)   |   moves on the reticle stage
             +-----------------------+
                         |
                projection lens (4x reduction,
                NA up to 1.35 with water)
                         |
                 ~~~~ water film ~~~~      (immersion only)
             +-----------------------+
             |  resist  ............ |
             |  film to be patterned |   wafer on the wafer stage
             |  silicon wafer        |
             +-----------------------+

Two things make this harder than photography. First, the features are smaller than the wavelength of the light, so the image at the wafer is a blurred interference pattern rather than a sharp copy, and the resist has to turn that blurred intensity profile into a sharp edge. Second, each new layer must land on the layers already printed with an error of a few nanometres or less across a 300 mm wafer. The first problem is resolution. The second is overlay. Most of this article is about how the industry solved both.

The process flow: coat, bake, expose, bake, develop, etch, strip

A lithography cell is a scanner bolted to a track. The track is a robotic coater and developer that prepares the wafer before exposure and develops it after. A wafer never leaves the cell between coating and development, because time and airborne chemistry between the steps change the result.

The step that most people forget is step 9. Lithography is the only major step that can be undone. If metrology after development shows bad overlay or CD, the resist is stripped and the wafer goes through the cell again. Once etch has run, the error is cut into the wafer. That is why fabs measure aggressively at this point and feed the results back to the scanner, a loop described in the overlay section below.

Exposure history: contact, proximity, projection, steppers and scanners

Contact printing

The earliest integrated circuits were patterned by pressing a 1x mask directly against the resist coated wafer and flooding it with ultraviolet light from a mercury lamp. With the mask touching the resist, there is almost no gap for light to spread through diffraction, so contact printing can resolve features close to the wavelength. Jain, Willson and Lin's 1982 excimer laser paper in IEEE Electron Device Letters used contact printing and reported resolution down to 1000 line pairs per millimetre, which is a period of 1 µm.

The problem is the contact itself. Every exposure picks up particles and resist on the mask and scratches it, and every particle on the mask prints as a defect on the next wafer. Masks wore out after a small number of uses, and defect density limited yield.

Proximity printing

Proximity printing leaves a small gap, typically micrometres to tens of micrometres, between the mask and the wafer. The mask lasts much longer, but light diffracts across the gap. Standard lithography texts give the minimum printable grating period for proximity printing as roughly 3·sqrt(λ·(g + d/2)), where g is the gap and d is the resist thickness. Here are the numbers for a 1 µm resist film, computed with Python:

The square root is the important part. Halving the gap does not halve the feature size. A 10 µm gap, which is easy to hold mechanically, already limits you to features around 3 µm. That ceiling is why the industry moved to projection.

Projection printing: scanning aligners, steppers and step and scan

Projection printing puts a lens system between mask and wafer, so the mask never touches anything and lasts a very long time. The first projection systems were 1:1 reflective scanners that imaged a slit across the whole wafer in one sweep. Their masks had to be the same size as the wafer pattern, which made mask defects and mask CD errors print one for one.

The stepper replaced full wafer exposure with a small field and a reduction lens. The mask holds the pattern for one field at 5x or 4x size, the lens images it reduced onto one site, and the stage steps to the next site and repeats. Reduction is a large help to mask making, because a 4 nm error on a 4x mask becomes 1 nm at the wafer if the imaging is linear. ZEISS records that its S-Planar 10/0.28 lens of 1977 reached 1 µm resolution and was used in the first wafer stepper, and that its first i-line lens followed in 1982. ASML's own history begins in 1984 with the PAS 2000 stepper, followed by the PAS 2500 in 1986, the year ASML says its partnership with Carl Zeiss began.

As features shrank, it became impractical to build a lens that was corrected across a large square field at high NA. The answer was step and scan. A scanner illuminates only a narrow slit of the mask and moves the reticle and wafer in opposite directions, synchronised, so the slit sweeps the field. The lens only has to be well corrected across the slit, not the whole square. The reticle moves four times faster than the wafer because of the 4x reduction. ASML's NXT:2000i supports a full 26 x 33 mm field at 4x reduction, which means the pattern on the mask is 104 x 132 mm.

The last big platform change was the dual stage. ASML introduced its TWINSCAN platform with dual stage technology in 2001. One wafer is measured (alignment and a full height map for focus) on one stage while the previous wafer is exposed on the other, so measurement time no longer costs throughput.

      dual stage scanner timeline (simplified)

  stage A:  [ measure wafer 1 ][ expose wafer 1 ][ measure wafer 3 ][ expose wafer 3 ]
  stage B:  [   (idle)        ][ measure wafer 2 ][ expose wafer 2 ][ measure wafer 4 ]
                                  ^ swap            ^ swap            ^ swap

Exposure technology timeline

Light sources: mercury lamps to excimer lasers

The wavelength is the most direct lever on resolution, so the history of lithography is partly a history of light sources.

g-line and i-line mercury lamps

High pressure mercury arc lamps emit strong spectral lines. ASML lists the g-line at 436 nm, used in its first systems to print features as small as 1 µm, and the i-line at 365 nm, which pushed features below 1 µm and eventually down to 220 nm. A filter selects one line. Lamps are cheap, stable and bright in those lines, and i-line steppers remain in use for layers that do not need fine resolution.

KrF and ArF excimer lasers

Below 365 nm, mercury lamps run out of useful power. Excimer lasers fill the gap. An excimer laser excites a gas mixture of a noble gas and a halogen with an electrical discharge. The excited molecule, krypton fluoride or argon fluoride, exists only in the excited state and emits a deep ultraviolet photon as it falls apart. KrF emits at 248 nm and ArF at 193 nm. ASML describes the mid 1980s as the point where demand for smaller features pushed the industry towards lasers, with KrF powering its first DUV systems and ArF the next generation, which enabled 38 nm features.

The IBM paper by Jain, Willson and Lin in 1982 was, in its own words, the first description of high power pulsed excimer lasers used for photolithography. It reported exposures roughly 100 times faster than lamp based exposure, with comparable image quality and no speckle.

Lithography lasers are not ordinary excimer lasers. They are line narrowed to a very small spectral bandwidth, because refractive lenses made of fused silica and calcium fluoride bend different wavelengths by different amounts (chromatic aberration). A broadband source would blur the image. Bandwidth is usually specified as E95, the width that contains 95 percent of the energy. As one vendor example, Gigaphoton lists its GT61A ArF laser for immersion tools with NA of 1.3 or more at 193 nm, 6,000 Hz, 60 W, 10.0 mJ per pulse and an E95 bandwidth of 0.35 pm, all as typical values. The product is no longer available for new orders, but it shows the order of magnitude: a bandwidth of about a third of a picometre on a 193 nm line, which is less than two parts per million.

Some quick checks on those figures, all computed with Python:

The photon energy explains part of the resist story. At 6.4 eV, a 193 nm photon is absorbed strongly by many organic structures, including the aromatic rings that 248 nm resists were built on. That is why 193 nm resists had to be redesigned from scratch.

The physics: resolution, k1 and numerical aperture

The Rayleigh criterion

ASML writes the resolution equation as CD = k1·λ/NA. CD (critical dimension) is the smallest feature the process can print, usually stated as half of the minimum pitch for dense lines. λ is the wavelength. NA is the numerical aperture, a measure of how much light the projection optics can collect. k1 is a process factor that captures everything else: illumination, mask type, resist and how hard the process engineers push. ASML gives k1 = 0.25 as the physical limit for lithography.

Why 0.25? A dense grating of lines and spaces diffracts light into orders at angles set by the pitch. The lens forms an image only if it captures at least two of those orders. With on axis illumination, the zero order and both first orders must pass through the pupil, which requires a pitch of at least λ/NA, so the half pitch is 0.5·λ/NA. With fully tilted illumination, only the zero order and one first order are needed, the two can sit at opposite edges of the pupil, and the minimum pitch halves to λ/(2·NA). Half of that pitch is 0.25·λ/NA. No single exposure with an imaging lens can print a denser grating, whatever the mask or resist.

   on axis illumination                  off axis (dipole) illumination
   needs orders -1, 0, +1 in the pupil    needs only orders 0 and +1

        pupil edge   pupil edge              pupil edge     pupil edge
           |    -1   0   +1    |                |  0          +1 |
           |     *   *   *     |                |  *           * |
   pitch_min = lambda / NA                pitch_min = lambda / (2 NA)
   half pitch = 0.50 lambda / NA          half pitch = 0.25 lambda / NA

Worked numbers in Python

The code below computes CD for each generation at three k1 values. It runs on any machine with Python 3; the numbers in this article come from running it.

import math

cases = [
    ("i-line 365 nm, NA 0.60 (illustrative)", 365, 0.60),
    ("KrF 248 nm, NA 0.80 (NXT:870 maximum)", 248, 0.80),
    ("ArF dry 193 nm, NA 0.93 (illustrative)", 193, 0.93),
    ("ArF immersion 193 nm, NA 1.35", 193, 1.35),
    ("EUV 13.5 nm, NA 0.33", 13.5, 0.33),
    ("High NA EUV 13.5 nm, NA 0.55", 13.5, 0.55),
]

for name, lam, na in cases:
    cds = [round(k1 * lam / na, 1) for k1 in (0.25, 0.30, 0.40)]
    print(name.ljust(42), "CD at k1 0.25/0.30/0.40 =", cds, "nm")

# What k1 does a quoted resolution imply?
for res in (38, 40):
    print(res, "nm at NA 1.35 implies k1 =", round(res * 1.35 / 193, 3))

Output:

ASML's NXT:2000i page quotes production resolution of 40 nm with C-quad illumination and 38 nm with dipole illumination at NA 1.35. Those correspond to k1 of 0.280 and 0.266. In other words, production immersion scanners run within about 6 to 12 percent of the hard single exposure limit. That is the context for everything in the resolution enhancement and multi-patterning sections: there is very little room left in the equation.

Two worked examples make the scaling concrete.

Example 1: the minimum single exposure pitch on 193 nm immersion. At the limit, the half pitch is 0.25 x 193 / 1.35 = 35.7 nm, so the pitch is 71.5 nm. At a more realistic k1 of 0.28, the pitch is 80.1 nm. Any layer drawn tighter than roughly 76 to 80 nm pitch needs more than one patterning step on 193 nm immersion.

Example 2: what dry ArF can do. With an illustrative dry NA of 0.93, the limit half pitch is 51.9 nm. The jump from 0.93 to 1.35 NA is a factor of 1.45, which is the whole benefit of immersion on the resolution side.

Depth of focus

Resolution is only half of the trade. A lens with higher NA also focuses light into a steeper cone, so the image goes out of focus faster as the wafer moves up or down. The textbook paraxial form is DOF = k2·λ/NA². Because NA is squared, depth of focus shrinks faster than resolution improves.

The k2 values here are illustrative. Real usable depth of focus depends on feature type, illumination, mask and the CD tolerance the process allows. The point is the trend. A 300 mm wafer is not perfectly flat, the films on it have topography, and the resist itself has thickness. The scanner's level sensor maps the height of every field before exposure, and the stage tilts and moves in z during the scan to keep the image in focus. When the usable depth of focus falls to around 100 nm, every nanometre of wafer flatness and stage control matters.

The paraxial formula is also inaccurate at high NA. Burn Lin's papers in the Journal of Micro/Nanolithography, MEMS, and MOEMS (JM3) introduced non paraxial scaling equations, in which depth of focus scales as k3·λ/(n·sin²(θ/2)), where n is the refractive index of the medium between lens and wafer and θ is the half angle of the light cone in that medium, so that NA = n·sinθ. This form is what shows the real benefit of immersion, as the next section works out.

Immersion lithography: water at the bottom of the lens

Why NA could not pass 1

Numerical aperture is defined as NA = n·sinθ. In air, n is 1 and sinθ cannot exceed 1, so no dry lens can have an NA of 1 or more. ASML's lens page says it directly: without the water, an NA above 1 was impossible. Practical dry ArF lenses topped out below that limit because sinθ near 1 means light arriving almost parallel to the wafer.

What water changes

Fill the gap between the last lens element and the wafer with a liquid of index n and two things happen. The maximum NA becomes n rather than 1, and the wavelength inside the liquid becomes λ/n. Water is a fortunate choice at 193 nm: it is highly transparent there and its index is about 1.44. The Willson group at the University of Texas lists n = 1.435 for water at 193 nm with absorbance of 0.036 per centimetre. Burnett and Kaplan at NIST published precise measurements of the index and its temperature coefficient near 193 nm in 2003 and 2004, because the index is sensitive enough to temperature that the water must be held very stable for the lens to stay in focus.

Worked numbers, computed with Python:

The lens works with steep rays: the marginal ray at NA 1.35 travels about 70 degrees from vertical inside the water. Designing a lens that keeps those rays well corrected is why ZEISS moved to catadioptric designs, which combine mirrors and lenses, for its Starlith 1700i in 2005. ASML's NXT:2000i uses a 1.35 NA 193 nm in line catadioptric lens with a full 26 x 33 mm field.

The depth of focus bonus

Immersion has a second benefit that matters even when NA is not increased. At the same NA, the light cone inside water is less steep than in air, because sinθ is smaller by a factor of n. A less steep cone defocuses more slowly. Using Lin's non paraxial form with the same k3 for both cases:

import math

def lin_dof(lam, na, n_medium, k3=1.0):
    theta = math.asin(na / n_medium)
    return k3 * lam / (n_medium * math.sin(theta / 2) ** 2)

for na in (0.85, 0.93):
    dry = lin_dof(193, na, 1.0)
    wet = lin_dof(193, na, 1.44)
    print(na, "wet/dry DOF ratio =", round(wet / dry, 3))

So a fab could have used immersion purely to gain about 70 to 85 percent more depth of focus at the same resolution. In practice the industry took both: it moved to NA 1.2, then 1.35, spending most of the depth of focus gain on resolution. The absolute values from this function depend on k3, which varies with the process, so only the ratio should be read from it.

Engineering problems immersion had to solve

Immersion sounds simple. Building it at 300 mm production speed was not.

• Keeping the water local. The wafer stage moves at high speed under the lens. An immersion hood holds a puddle of water only under the lens and recovers it at the edge, so the water must not leave droplets behind when the stage reverses or moves off the wafer edge.
• Bubbles and particles. A bubble or particle in the water scatters light and prints as a defect. The water is degassed, filtered and held at a controlled temperature.
• Water marks and leaching. Droplets left on the resist can leave marks. Resist components such as the photoacid generator can leach into the water, contaminate the lens and change the resist. Topcoats or topcoat free resists with surface active additives address this.
• Temperature. Because the index of water changes with temperature, the water temperature must be held tightly or the focus and aberrations drift.
• Polarisation. At very high NA, the vector nature of light matters: for some polarisation states, light rays arriving at steep angles interfere poorly. High NA immersion scanners use polarised illumination to keep image contrast.

ASML records its first immersion system, the TWINSCAN AT:1150i, in 2003, the XT:1700i as the first volume production immersion system in 2006, and the XT:1900i with NA 1.35 in 2007. ZEISS calls its Starlith 19xxi line, produced from 2007, its top selling product. Higher index fluids were researched as a way to go past 1.35, but the industry moved its leading edge to EUV instead.

Resolution enhancement: OPC, phase shift masks and off axis illumination

Once λ and NA stopped improving fast, the remaining lever was k1. Resolution enhancement techniques (RETs) are the methods that push k1 from around 0.6 or more down towards 0.27. They fall into three groups: change the mask pattern, change the phase on the mask, and change the shape of the illumination.

Optical proximity correction (OPC)

At low k1 the printed image is not a scaled copy of the mask. Line ends pull back, corners round off, isolated lines print at a different width from dense lines with the same drawn width, and small gaps close up. Optical proximity correction distorts the mask so that the printed image comes out right.

   drawn layout          mask after OPC                 printed result
   +-----------+         +--+-----------+--+            +-----------+
   |           |         |  |           |  |            (           )
   +-----------+         +--+-----------+--+            +-----------+
                           ^ hammerheads at line ends     line ends land
                                                          where intended

Early OPC was rule based: add a serif to every outside corner, extend line ends by a fixed amount, bias isolated lines. Model based OPC replaced the rules with a calibrated simulation of the optics and resist. The layout is cut into edge fragments, each fragment is moved in or out, and the image is simulated again until the printed contour matches the target within tolerance. A full chip OPC run is a large distributed computing job. Sub resolution assist features (SRAFs) are thin lines placed near isolated features. They are too small to print themselves but make an isolated line diffract more like a dense one, which improves its depth of focus.

The next steps were source mask optimisation (SMO), which tunes the illumination shape and the mask together, and inverse lithography technology (ILT), which computes the mask as the solution of an optimisation problem and often produces curved shapes. Together these are called computational lithography. ASML's history notes its acquisition of the computational lithography company BRION in 2007.

Phase shift masks

A conventional binary mask is chrome on quartz: light passes or it does not. A phase shift mask also controls the phase of the light.

The alternating phase shift mask, published by Marc Levenson and colleagues at IBM in IEEE Transactions on Electron Devices in December 1982, etches every second clear opening deeper into the quartz so that light passing through it is shifted by 180 degrees. Light from neighbouring openings then interferes destructively under the chrome line between them, which drives the intensity there to zero and sharpens the dark line. Patent records citing the IBM filing report a usable resolution gain of 40 percent in their tests. The catch is that every pair of neighbouring openings must have opposite phases, which creates phase conflicts in real layouts, and the edge where 0 and 180 degree regions meet prints a dark line that needs a second "trim" exposure to remove.

The thickness of the phase step follows from the optical path difference. For a 180 degree shift, the etch depth is t = λ/(2·(n − 1)), where n is the index of the quartz. For an index near 1.56 at 193 nm, t is about 172 nm. Use the exact index of your mask substrate at the operating wavelength; this value is only illustrative.

The attenuated phase shift mask is the more common type. It replaces the opaque chrome with a partly transmitting film that also shifts the phase by 180 degrees. The small amount of light that leaks through the dark regions is out of phase with the light from the openings, which steepens the edge of the image. Attenuated masks have no phase conflicts, so they are easier to design, and they are widely used for contacts and line layers.

Off axis illumination

The pupil diagram in the physics section explains why tilting the illumination helps dense lines: with light arriving at an angle, a finer grating still sends two diffraction orders through the lens. The illuminator shapes the source as seen from the mask.

ASML's NXT:2000i figures show the effect: 40 nm with C-quad illumination and 38 nm with dipole. ASML's NXT:2000i page describes its FlexRay illuminator as extending the range of conventional and off axis illumination, and the NXT:870 KrF page describes the AERIAL II illuminator offering continuously variable conventional and off axis illumination with zoom optics. The industry move to strictly one directional metal lines at advanced nodes is partly a consequence of dipole illumination: if every line on a layer runs the same way, the most aggressive illumination can be used.

Multi-patterning: LELE, SADP and SAQP

When the layout pitch is below what one exposure can print, the layer is made from more than one patterning step.

Litho etch litho etch (LELE)

LELE splits the layout into two masks, conventionally called colours. Each mask carries every second feature, so its pitch is double the final pitch and prints comfortably. The first pattern is exposed and etched into a hard mask, the wafer is coated again, the second pattern is exposed between the first features and etched, and the combined pattern is transferred to the film.

  target pitch p:     | | | | | | | |
  mask A (pitch 2p):  |   |   |   |
  mask B (pitch 2p):    |   |   |   |
  after both etches:  | | | | | | | |

Worked example: a target pitch of 40 nm needs two masks at 80 nm pitch each. From the Python table above, 80 nm pitch is about k1 0.28 on 193 nm immersion, which is printable.

The weakness of LELE is overlay. The spacing between an A line and its B neighbour is set by how well the second exposure lands on the first, so overlay error between the two exposures turns directly into CD variation of the spaces. Published analyses describe overlay between the two patterns as the main limitation of pitch split double patterning, with overlay requirements far tighter than for ordinary layer to layer alignment. Layout decomposition also creates "odd cycles", features that cannot be two coloured, and stitches where a polygon is split across two masks. Variants such as litho freeze litho etch (LFLE) chemically freeze the first resist pattern so the second can be coated and exposed without an etch in between, and LELELE (three masks) handles layouts that cannot be split into two colours.

Self aligned double patterning (SADP)

SADP removes the overlay sensitivity by building the second set of lines from the first.

 1. print mandrels (pitch 2p)        ███     ███     ███
 2. deposit conformal spacer film   ▛███▜   ▛███▜   ▛███▜
 3. etch spacer back (anisotropic)  ▌███▐   ▌███▐   ▌███▐
 4. remove mandrels                 ▌   ▐   ▌   ▐   ▌   ▐
 5. spacers are the new pattern     two lines per mandrel: pitch p

A mandrel line is printed and etched at twice the target pitch. A thin film is deposited conformally over it, for example by atomic layer deposition, then etched back anisotropically so that only the film on the mandrel sidewalls remains. The mandrels are removed, leaving two spacers for every mandrel. The spacers are the new pattern, at half the original pitch.

The spacer width is set by deposition thickness, not by lithography, so it is extremely uniform. The spaces, however, come from two sources: one set is the mandrel width and the other is the gap between neighbouring mandrels minus two spacer widths. If the mandrel CD drifts, alternate spaces change in opposite directions, an effect called pitch walking. SADP also creates closed loops at line ends, so a separate cut or block mask is needed to trim them, and that mask brings back an overlay requirement, just a more relaxed one.

Self aligned quadruple patterning (SAQP)

Run the spacer process twice and you quarter the pitch. The first spacers become the mandrels for the second spacers. A patent on SAQP describes the result directly: mandrel pitch P1, first spacer pitch P1/2, final pitch P1/4.

Worked example: a mandrel pitch of 96 nm, easy for 193 nm immersion, becomes 48 nm after the first spacer and 24 nm after the second. Imec and Cadence reported a tapeout using SAQP with 193 nm immersion to scale metal pitch from 32 nm to 24 nm, the pitch they associated with what foundries may call a 5 nm class process. SAQP produces several distinct line and space populations, so pitch walking is more complex, and a published SPIE paper on SAQP measurement describes the four line and space populations as a main process challenge.

The cost of multi-patterning is not just extra masks. Every extra pass adds deposition, etch, clean, metrology and cycle time, and the design rules become restrictive: lines on a fixed grid, one direction per layer, cuts at fixed positions. EUV lithography, which can print some of these layers in one exposure, is covered in a separate post in this series.

Photoresists: from DNQ novolac to chemically amplified resists

g-line and i-line resists

For mercury lamp lithography, the standard positive resist was a novolac resin mixed with a diazonaphthoquinone (DNQ) photoactive compound. Unexposed DNQ inhibits dissolution of the novolac in aqueous base. Light converts DNQ into an indene carboxylic acid, which no longer inhibits, so exposed areas dissolve. Each absorbed photon converts at most one DNQ molecule. That is not a problem with bright mercury lines, but it is with a much weaker source, and novolac absorbs too strongly in the deep ultraviolet to be used there.

Chemical amplification

The breakthrough came from IBM. The Japan Prize Foundation's 2013 citation records that Jean Fréchet spent a 1979 sabbatical at the IBM San Jose research centre working with Grant Willson, who led IBM's resist research, and that Hiroshi Ito, a postdoctoral researcher recruited by Willson, joined the project. The three shared the 2013 Japan Prize for chemically amplified resists.

The principle: instead of each photon making one molecule soluble, each photon generates one molecule of strong acid from a photoacid generator (PAG). During the post exposure bake, that acid catalyses a deprotection reaction in the polymer, removing a protecting group and turning an insoluble polymer into a base soluble one. The acid is regenerated after each reaction, so one photon leads to many deprotection events. The first system used poly(4-t-butoxycarbonyloxystyrene), called t-BOC, with an onium salt PAG.

   expose:   PAG  --hv-->  H+   (one acid per absorbed photon)
   PEB:      polymer-protect  --H+, heat-->  polymer-OH  +  volatile fragments  +  H+
                                             (base soluble)                  (acid reused)
   develop:  aqueous base dissolves the deprotected regions (positive tone)

Ito's IBM Journal of Research and Development article of 1997 notes that the concept was quickly used in DRAM manufacturing within IBM. Ito's 2008 SPIE retrospective states that a t-BOC resist was used in negative mode for mass production of 1 Mbit DRAMs with deep UV lithography at IBM in the mid 1980s.

Amplification brought new problems that shape how a lithography cell is run today.

• Post exposure delay. Early positive 248 nm resists failed when wafers waited between exposure and bake, because airborne amine contamination neutralised the acid at the resist surface and formed a "T-top" profile. The fix was chemically filtered air in the track and scanner, environmentally stable resist designs and tight timing between exposure and PEB.
• Acid diffusion and blur. The acid moves during the bake. Some diffusion smooths the image, but too much blurs it. This links resolution, line edge roughness and sensitivity in a three way trade off: a more sensitive resist with more amplification usually means more blur or more noise.
• PEB temperature uniformity. Because the chemistry runs during the bake, a small temperature error across a hotplate shows up as a CD error. Bake plates in modern tracks are among the most tightly controlled heaters in the fab.

193 nm resists

The aromatic rings of the polyhydroxystyrene platform used at 248 nm absorb strongly at 193 nm, so a 193 nm resist made from them would be opaque. ArF resists moved to acrylate and methacrylate polymers with bulky alicyclic groups for etch resistance, still with chemical amplification. For immersion, resists also had to resist leaching into water and leave no water marks, either with a separate topcoat or with additives that segregate to the surface.

Positive and negative tone, and negative tone development

Most chemically amplified resists are positive tone in aqueous base: exposed areas dissolve. Negative tone development (NTD) uses the same kind of resist but an organic solvent developer that removes the unexposed areas instead. Printing a small dark trench or contact hole with a bright field mask gives a better image than printing it with a dark field mask, so NTD is used for some contact and trench layers.

Masks: how a reticle is made and controlled

Writing the mask

A reticle starts as a fused silica blank coated with an absorber, chrome for binary masks or a phase shifting film for attenuated masks, plus resist. Because the mask is the master, it is written directly from data, without another mask. Mask writers use a focused electron beam or a laser to expose the mask resist, and multi beam writers expose many beams in parallel to handle the curved, highly fragmented shapes from OPC and ILT. After development and etch, the mask is measured for CD, registration (where each feature is relative to its intended position) and defects.

US export rules give a sense of the precision required. The October 2023 rule lists, under ECCN 3B001.f.3, mask making equipment using a deflected focused electron, ion or laser beam with a full width half maximum spot smaller than 65 nm and image placement better than 17 nm (mean plus 3 sigma), or a second layer overlay error on the mask below 23 nm (mean plus 3 sigma). Those are the control thresholds, not the specification of a leading tool.

Repair, inspection and pellicles

Masks are inspected for defects and repaired where possible. ZEISS lists its 1993 MSM 100, now called AIMS, as its first photomask inspection system; aerial image measurement emulates how a defect would print under the scanner's optics, which matters because not every mask flaw prints. A pellicle, a thin transparent membrane on a frame, is mounted a few millimetres above the patterned surface. Particles land on the pellicle, out of focus, instead of on the pattern.

Mask error enhancement

A 4x mask makes mask errors four times smaller at the wafer, but only if the imaging is linear. At low k1 it is not. The mask error enhancement factor (MEEF) is the ratio of the wafer CD change to the mask CD change divided by the reduction factor. Worked example: a 4 nm CD error on a 4x mask becomes 1 nm at the wafer if MEEF is 1, and 2.5 nm if MEEF is 2.5. Dense features near the resolution limit often have MEEF well above 1, so mask CD budgets get tighter just as features get smaller.

Overlay and CD control

What overlay means

Overlay is the placement error of a new layer relative to a layer already on the wafer. The US Bureau of Industry and Security (BIS) gives a useful definition in its 2023 rule: dedicated chuck overlay is the alignment accuracy of a new pattern to an existing pattern printed on a wafer by the same lithographic system, also known as single machine overlay. Matched machine overlay is the same measurement when the two layers were exposed on different scanners, which is the real situation in a fab with many tools.

Published overlay figures, from the vendor's own pages:

To put 0.9 nm in context: it is a few silicon atom spacings, achieved while the stage moves the wafer at high speed under a lens through a film of water. ASML's NXT:2100i page credits a lens distortion manipulator and other hardware and software changes, including improved DUV to EUV cross matching, which matters because advanced fabs expose some layers on EUV and neighbouring layers on DUV.

Where overlay error comes from

Independent error sources add as a root sum of squares. As an illustrative budget, scanner 1.5 nm, reticle registration 0.8 nm, process induced 1.2 nm and metrology 0.5 nm combine to sqrt(1.5² + 0.8² + 1.2² + 0.5²) = 2.14 nm. The numbers are invented to show the arithmetic, not taken from any fab. The point is that a sub nanometre scanner figure does not give sub nanometre on product overlay by itself; every other term has to shrink too.

Measuring and correcting overlay

Overlay is measured after development on dedicated targets in the scribe lines and, increasingly, in the die. Image based overlay uses box in box or grating patterns viewed with an optical microscope. Diffraction based overlay uses stacked gratings, one on each layer, and infers the shift from the asymmetry of the diffracted light. ASML lists its first YieldStar metrology system in 2008.

The results drive advanced process control (APC). Each lot's measured overlay is fitted to a model, from simple translation, rotation and magnification per wafer up to high order corrections per field and per exposure. Those corrections are fed back to the scanner for the next lot. Alignment before exposure measures marks on each wafer and corrects for that wafer's own distortion; the feedback loop corrects for what alignment cannot see.

   +---------+     +--------+     +-----------+     +-----------------+
   | scanner | --> | track  | --> | overlay & | --> | APC model fit   |
   | exposes |     | develop|     | CD metro. |     | per lot / field |
   +---------+     +--------+     +-----------+     +-----------------+
        ^                                                  |
        |__________ corrections for the next lot __________|

CD control: dose, focus and the process window

The other half of control is CD: making the lines the right width everywhere. The two main knobs are exposure dose and focus. A focus exposure matrix wafer prints a test pattern at a grid of focus and dose settings. Plotting CD against focus for each dose gives Bossung curves, and the region where CD stays inside tolerance defines the process window. The goal is to sit in the middle of that window so normal variation in focus and dose does not push CD out.

CD uniformity across the wafer is corrected by small dose adjustments per field and even within the scan, fed from CD metrology. PEB plate temperature, resist thickness, BARC thickness, etch loading and mask CD errors all appear in the final CD and must each be controlled.

Edge placement error

At multi-patterned layers, overlay and CD stop being separate problems. Whether a via lands on its line, or a cut mask trims the right end, depends on where each edge lands. Edge placement error (EPE) combines overlay, CD error and line edge roughness into one budget for where each edge actually ends up. The BIS rule text itself says the controlled immersion equipment is needed to reduce total edge placement error, which shows how central the concept has become.

Throughput and the economics of a scanner

A scanner is valued by how many good wafers it exposes per hour. ASML says its NXT:870 KrF scanner reaches 330 wafers per hour, which is about 10.9 seconds per 300 mm wafer, and describes its NXT:1470 as the first to go beyond 300 wafers per hour. A 300 mm wafer has an area of about 70,700 square millimetres and a full 26 x 33 mm field is 858 square millimetres, so the wafer area is about 82 field areas; the number of exposed fields is lower once partial edge fields are handled. Each field takes a scan, and dual stages let the next wafer's measurement happen in parallel.

Multi-patterning multiplies this cost. A layer printed with LELE needs two scanner passes, and SADP or SAQP adds deposition and etch steps even when the lithography count stays low. This cost pressure, as much as resolution, is what pulled the leading edge towards EUV for the densest layers.

Export controls on lithography equipment

Lithography equipment is subject to export controls. The facts below come from official texts and are stated without comment. This is not legal advice; check the current rules.

• United States. BIS published "Export Controls on Semiconductor Manufacturing Items" in the Federal Register on 25 October 2023 (88 FR 73424), revising the 7 October 2022 interim final rule. It revised ECCN 3B001.f.1 to control step and repeat and step and scan equipment with a light source wavelength shorter than 193 nm, or with a wavelength of 193 nm or longer that can produce a minimum resolvable feature (MRF) of 45 nm or less and has a maximum dedicated chuck overlay of 2.4 nm or less, in two bands (1.50 nm or less, and above 1.50 nm up to 2.4 nm). The rule was effective 17 November 2023 with stated exceptions. Later rules have amended these controls, so read the current Export Administration Regulations rather than relying on the 2023 text.
• The MRF formula in the rule is wavelength x K factor divided by maximum numerical aperture, with K factor 0.25. That is the Rayleigh criterion at its single exposure limit. Worked numbers: 193 nm at NA 1.35 gives 35.74 nm; at NA 0.93 it gives 51.88 nm; KrF at 248 nm and NA 0.80 gives 77.5 nm. Only the first is at or below the 45 nm threshold, which is why the immersion overlay bands carry the weight of that rule.
• The Netherlands. The Dutch government states that national export control rules for advanced semiconductor manufacturing equipment have applied since 1 September 2023, covering specific deep ultraviolet lithography equipment, and that the measure was expanded on 7 September 2024. It says applications are assessed case by case and that the measure is not an export ban.

Where Safeguard fits, honestly

Safeguard does not design, program, calibrate or speed up lithography tools, and nothing in this article depends on Safeguard. The fit is indirect, and it is the software around the hardware.

A lithography cell is a cluster of computers. Scanners, tracks, metrology tools and mask writers run vendor control software. Around them sit the fab's own systems: recipe management, advanced process control servers, data collection and analysis pipelines, and computational lithography jobs that run on large clusters. Much of that fab owned software, and many vendor deliverables, are built from open source components such as Linux distributions, Python packages, Java libraries and container images. Those components get CVEs like any others. Safeguard can generate SBOMs and match vulnerabilities for the code and images a fab or tool vendor builds (safeguard scan --dir ., safeguard scan --image <name>), and can analyse an SBOM a tool vendor supplies (safeguard scan --sbom <file>), so a security team can see which systems carry a vulnerable component and fix the ones they build. It does not scan tool firmware, and fixes inside a vendor's closed control software still have to come from that vendor.

For the wider picture of software and firmware inventories across fab equipment, see what an SBOM looks like for semiconductor fab machines and firmware. For where lithography sits in the full chip flow, see how a GPU is made, from wafer to HBM package and accelerator board, and for the chips this process builds, AI chip architecture and what an AI accelerator is and how it works.

Common mistakes

"You cannot print features smaller than the wavelength." Production 193 nm immersion prints 38 nm half pitch in a single exposure and much finer pitches with multi-patterning. The limit is k1·λ/NA, not λ.

"k1 is a constant of nature." k1 is a process factor. Its floor for a single exposure is 0.25, but the value a fab achieves depends on illumination, mask type, resist, OPC and how much process window it is willing to give up.

"NA can never exceed 1." It cannot in air. NA = n·sinθ, and with water at n of about 1.44, production lenses reach 1.35.

"Immersion only helped resolution." At the same NA, immersion also gives roughly 1.7 to 1.9 times more depth of focus in the non paraxial model, which is why it was attractive even before NA went above 1.

"Node names are feature sizes." Marketing node names such as "5 nm" do not correspond to any single printed dimension. Imec's SAQP example associates a 24 nm metal pitch with a process foundries may call 5 nm class.

"Overlay is the same as alignment." Alignment is what the scanner measures before exposure. Overlay is the result measured afterwards, and it includes errors alignment cannot see, such as lens distortion, reticle registration and process induced wafer distortion.

"A 4x mask divides every error by four." Only when MEEF is 1. At low k1, MEEF is often greater than 1, so mask errors are amplified relative to simple reduction.

"Self aligned patterning has no overlay problem." The spacer lines are self aligned, but the cut or block masks that trim them are not, and pitch walking moves edges even without any overlay error.

"The post exposure bake is just drying." In a chemically amplified resist, the post exposure bake is where the image chemistry happens. Its temperature uniformity shows up directly in CD.

FAQ

What is photolithography in simple terms?

It is a way of printing a pattern onto a wafer with light. A light sensitive coating called photoresist is exposed through a mask, the exposed or unexposed parts are washed away, and the remaining resist protects the film beneath while the pattern is etched into it.

What is the difference between a stepper and a scanner?

A stepper exposes a whole field at once through a reduction lens, then steps to the next site. A scanner illuminates only a slit and moves the mask and wafer in synchrony so the slit sweeps across the field. Scanning lets the lens be corrected over a slit rather than a large square, which made high NA lenses with large fields practical.

Why is 193 nm still used if EUV exists?

Many layers do not need EUV resolution, and 193 nm immersion is mature and has high throughput. EUV is reserved for the densest layers, while DUV immersion and dry DUV handle the rest. ASML's NXT:2100i page explicitly stresses DUV to EUV cross matching for this mixed use.

How does immersion lithography work?

A thin film of ultrapure water fills the gap between the last lens element and the wafer. Water has an index near 1.44 at 193 nm, so the numerical aperture can exceed 1 (up to 1.35 in production) and depth of focus improves at a given NA. The water is held locally under the lens by an immersion hood that moves with the scan.

What is the Rayleigh criterion in lithography?

ASML gives it as CD = k1·λ/NA, with 0.25 as the physical limit of k1. For 193 nm light and NA 1.35, the limit is about 35.7 nm half pitch, and production systems run near k1 0.27 to 0.28.

What is multi-patterning and why is it needed?

When the target pitch is below what one exposure can print, the layer is built in steps. LELE splits the layout across two masks. SADP and SAQP use deposited spacers to halve or quarter a printed pitch. On 193 nm immersion, any pitch below roughly 76 to 80 nm needs one of these methods.

What is a chemically amplified resist?

A resist in which each absorbed photon releases a molecule of acid, and that acid catalyses many solubility switching reactions during the post exposure bake. The concept was developed at IBM by Ito, Willson and Fréchet, and it made deep ultraviolet lithography sensitive enough for production.

What is overlay in semiconductor manufacturing?

Overlay is how far a newly printed layer lands from where it should relative to an earlier layer. Single machine overlay compares layers exposed on the same scanner; matched machine overlay compares layers exposed on different scanners. ASML states 0.9 nm single machine and 1.3 nm matched machine overlay for its NXT:2100i.

What is OPC in lithography?

Optical proximity correction deliberately distorts the mask so the printed pattern matches the design. It adds features such as hammerheads at line ends, serifs at corners and sub resolution assist features near isolated lines, using a calibrated model of the optics and resist.

Does Safeguard make or improve lithography tools?

No. Safeguard does not design, program or speed up any hardware. It applies to the software around the fab: SBOMs and vulnerability matching for the code, container images and supplied SBOMs that fab and tool software teams build or receive.

Why software hygiene still matters in a fab

A lithography cell is run by software: tool control stacks, recipe and process control servers, metrology analysis and computational lithography clusters, many of them built on open source libraries and container images. When one of those components has a known vulnerability, the fab or tool vendor that builds the software is the one that has to ship the fix, and the steps below apply to that software, not to the optics or the tool firmware.

More in this series

Other posts in our GPUs, CPUs, QPUs and lithography series:

• AMD GPU Architecture Explained: GCN, RDNA, CDNA, Infinity Fabric and HIP
• CPU vs GPU vs QPU Explained: How Each Works and Why They Coexist
• CUDA Programming Model Explained: Grids, Blocks, Warps and Memory
• GPU Memory and Interconnects: HBM, GDDR, NVLink, PCIe, CXL
• CUDA vs HIP vs SYCL vs OpenCL vs Metal vs Vulkan vs Triton Compared
• GPU Software Supply Chain: Drivers, CUDA, cuDNN, NCCL and Your SBOM
• How a QPU Works: Qubit Chips, Fridges, Control Pulses and Readout
• How CPUs Work: Pipelines, Out-of-Order, Caches, Branches, SIMD
• How EUV Lithography Machines Work: Tin Plasma, Mirrors and High-NA
• How GPUs Work: Graphics Pipeline, Shader Cores, Ray Tracing and Compute
• Inside an NVIDIA SM: Warp Schedulers, Registers, Tensor Cores
• Intel GPU Architecture: Xe Cores, XMX, Ponte Vecchio and oneAPI SYCL
• NVIDIA GPU Architecture History: From Tesla and Fermi to Blackwell
• NVIDIA vs AMD vs Intel vs Apple GPUs: Architectures Compared
• Optimizing a CUDA Matrix Multiply Step by Step, From Naive to Tensor Cores
• Tile-Based GPUs Explained: Apple, Mali, Adreno, PowerVR and TBDR

Fix it without waiting for upstream

Whatever the vulnerability, most of the risk sits in two gaps. The first is the time between a fix being published and that fix actually running in your production builds. The second, and worse, is the time before any fix exists at all, while a maintainer works out a patch and a release schedule. Waiting through both gaps is a habit, not a requirement. Safeguard gives teams three ways to close them.

1. Autonomous remediation: pull requests, not tickets

When a fixed version exists, Safeguard's Griffin models open a tested, policy gated pull request that moves the affected dependency to the safe version. You can run it on one repository or in bulk across every project that carries the vulnerable version. Remediation covers eight categories, including dependencies, licenses, security posture and findings. Reachability analysis ranks the vulnerable code paths your application actually calls first, so the first pull requests you merge are the ones that matter most. Autonomous remediation ships switched off, with every category set to Manual, so your team decides how much runs on its own and what still needs a human approval.

2. Gold Open Source: the safe version in seconds, free

gold.safeguard.sh is free and needs no login. Search any CVE or package to see affected and fixed versions, CVSS, EPSS, CISA KEV status and a recommended safe version, or use the "Am I affected?" checker. The same data is available through a free read API, README status badges and RSS threat feeds. The safeguard-sh/gold-scan-action GitHub Action can fail a build on a known exploited vulnerability, on any known vulnerability, or never, so a version you have just removed cannot quietly come back in next week's merge.

3. Gold Registry: start from components that are already fixed

registry.safeguard.sh provides hardened, drop in replacements for upstream packages and container images. Every Gold artifact is held continuously to zero exploitable critical or high CVEs, zero malware and a completed license check, with SLSA L3 or higher provenance, a Sigstore signature and a public evidence page you can hand to an auditor. An artifact loses its Gold badge if it regresses. Teams can point their own package directory at the registry so hardened equivalents resolve without changing how developers install anything.

When upstream has no fix yet, or will not ship one, Safeguard first works to get the fix accepted upstream. If the issue is severe or upstream will not move, Safeguard builds a fork, fixes the vulnerability there and publishes a hardened Gold build, so you are not stuck on a maintainer's release schedule. You can also request a hardened, compatibility tested build of a specific package. This fork and patch flow is in early access today, so ask which packages it covers before you plan around it.

One honest limit: when the vulnerable code lives in a vendor appliance, a hosted service or an operating system runtime you do not build yourself, the fix still has to come from that vendor or distribution. The steps above apply to the open source dependencies and container images you build and ship, which is where most teams carry the largest and least tracked share of their exposure.

See how Safeguard would help

The first demo is a real Safeguard CLI session. You install it, run safeguard to open the interactive terminal and ask it to fix the lodash CVE in a repository. It reads the finding and advisory, asks before any command that changes something, edits package.json to lodash 4.17.21, runs npm install and npm test with your approval, prints a summary and pushes nothing. The same flow applies to a fab's own process control or data analysis code, and /scan . gives you a first inventory of its dependencies.

Click through it at your own pace, or open it full screen.

The second demo sets up the local runner on your own machine, approves it with its device code, then scans from the terminal. Fab networks are usually segmented and tightly controlled, so running scans on a machine inside your own network, where the code already lives, is the pattern that fits.

Click through it at your own pace, or open it full screen.

The third demo connects Claude to the Safeguard MCP server with OAuth and shows how you choose which tools Claude can use. Once connected, you can ask which of your projects contain a vulnerable component, which helps decide which fab software builds to patch first after an advisory.

Click through it at your own pace, or open it full screen.

To try it on your own projects, download Safeguard or read the CLI documentation.

Quick check

Sources

• ASML: Rayleigh criterion (lithography principles)
• ASML: Light and lasers (lithography principles)
• ASML: Lenses and mirrors (lithography principles)
• ASML: TWINSCAN NXT:2000i
• ASML: TWINSCAN NXT:2100i
• ASML: TWINSCAN NXT:870
• ASML: Our history
• ZEISS: History of lithography optics
• Gigaphoton: GT61A 6 kHz excimer laser for immersion lithography tools
• K. Jain, C. G. Willson, B. J. Lin, "Ultrafast deep UV lithography with excimer lasers", IEEE Electron Device Letters EDL-3(3), 1982 (IBM Research record)
• H. Ito, "Chemical amplification resists: History and development within IBM", IBM Journal of Research and Development 41(1), 1997 (IBM Research record)
• H. Ito, "Rise of chemical amplification resists from laboratory curiosity to paradigm", Proc. SPIE 6923, 2008
• Japan Prize Foundation: 2013 laureates (Willson, Fréchet)
• M. D. Levenson et al., "Improving resolution in photolithography with a phase-shifting mask", IEEE Transactions on Electron Devices ED-29(12), 1982, as cited in European patent EP0090924
• B. J. Lin, "Immersion lithography and its impact on semiconductor manufacturing", JM3 3(3), 2004
• B. J. Lin, "The k3 coefficient in non-paraxial λ/NA scaling equations for resolution, depth of focus, and immersion lithography", JM3 1(1), 2002
• J. H. Burnett and S. G. Kaplan, "Measurement of the refractive index and thermo-optic coefficient of water near 193 nm", JM3 3, 2004 (NIST record)
• Willson Research Group, University of Texas: Immersion lithography theory
• US patent 10,559,501: Self-aligned quadruple patterning process for fin pitch below 20 nm
• eeNews Europe: imec and Cadence tape out first test chip for 5 nm technologies (SAQP, 24 nm metal pitch)
• Proc. SPIE 9778: Innovative scatterometry approach for self-aligned quadruple patterning (SAQP) process
• US Federal Register: Export Controls on Semiconductor Manufacturing Items, 88 FR 73424, 25 October 2023
• Government of the Netherlands: The Netherlands expands export control measure for advanced semiconductor manufacturing equipment, 6 September 2024
• Book, cited by title: L. F. Thompson, C. G. Willson and M. J. Bowden (eds.), Introduction to Microlithography (proximity printing resolution and DNQ novolac resist chemistry).
• Book, cited by title: C. A. Mack, Fundamental Principles of Optical Lithography (depth of focus, MEEF, process window).

Last reviewed: 25 October 2026. Tool specifications and export rules change; check the linked vendor pages and the current official texts before relying on a specific figure.