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HBM supply explained: who makes AI memory and why it is tight

High bandwidth memory (HBM) is built by three companies and sits beside every AI accelerator. How it works, what the 2026 numbers say, and what to watch.

Safeguard Security Team
14 min read

High bandwidth memory, or HBM, is a stack of DRAM chips placed right next to an AI processor so it can read data very fast. Three companies supply it at scale: SK hynix, Samsung and Micron, each of which lists HBM4 products. As of 19 October 2026, company statements and analysts describe memory supply as tight, and prices as high.

That one paragraph hides a lot. This post explains what HBM is, why AI chips cannot do without it, how a new generation gets from lab to rack, what the three makers have said about their own business this year, and which numbers are firm and which are not. Market share by maker is covered in two companion posts, linked below. Every figure is labelled with who reported it and when.

Key numbers at a glance

  • SK hynix, 12 September 2025 (company release): HBM4 development completed, with 2,048 I/O terminals, double the previous generation, and operating speed above 10 Gb/s against a JEDEC standard of 8 Gb/s.
  • SK hynix, 26 September 2024 (company release): 12 high HBM3E in volume production, 36 GB per stack at 9.6 Gb/s.
  • Micron product page (accessed 19 October 2026): HBM4 36 GB, 12 high, over 11 Gb/s per pin, over 2.8 TB/s per stack, described as in high volume production.
  • Samsung product page (accessed 19 October 2026): HBM4 36 GB, 12 high, up to 13.0 Gb/s per pin, up to 3,300 GB/s per stack, built with 1c DRAM and a 4nm logic base die. These are vendor claims.
  • SK hynix 2Q26 results (company statement, 29 July 2026, preliminary and unaudited): revenue 79.3187 trillion won, operating profit 60.5426 trillion won, operating margin 76%.
  • SK hynix 2Q26: began mass shipments of HBM4 in the second quarter, with HBM4E sample shipments completed in the first half.
  • SK hynix 2Q26: long term agreements finalised with about 10 customers.
  • Micron fiscal fourth quarter 2026 (company release, 30 September 2026): revenue 54.23 billion dollars, full year 133.19 billion dollars versus 37.38 billion dollars a year earlier.
  • Micron guidance for fiscal first quarter 2027 (same release): 61.5 billion dollars, plus or minus 1.5 billion.
  • TrendForce (14 October 2026, analyst estimate): spending by nine large cloud companies of about 957 billion dollars in 2026 and above 1.5 trillion dollars in 2027.
  • TrendForce (same date): AI server shipments up 32.2% in 2026 and nearly 36% in 2027.
  • Dell'Oro Group (16 September 2026, analyst report): data center capital spending grew 92% in the second quarter of 2026, and rising memory and storage prices raised server selling prices.

What HBM actually is

A normal computer memory module, the kind in a laptop or server, sits on a slot some distance from the processor. Data travels along a fairly narrow path. HBM takes the opposite approach. Several DRAM chips (the memory chips that hold working data) are stacked on top of each other like floors in a building. Tiny vertical connections, called through silicon vias or TSVs, run through the chips so they can talk to each other. At the bottom of the stack sits a base die, a chip that manages traffic between the stack and the outside world.

The whole stack is then mounted on the same carrier as the processor, usually on a thin slab of silicon called an interposer, so the memory and the processor are only millimetres apart. This approach is often called 2.5D packaging. The short distance is what makes a very wide connection practical.

How wide? Micron's own product FAQ describes a single HBM cube as having a 1,024 bit data interface with 32 independent channels, which it says is 16 times wider than a standard DDR5 module. Starting with HBM4, the interface doubles to 2,048 bits. Width is the whole point. A wide road at moderate speed moves more traffic than a narrow road at high speed, and it uses less energy per bit moved.

Why AI chips need it

Training and running large AI models is often limited by how fast the processor can be fed, not by how fast it can calculate. Each generated word, for example, requires reading a very large set of model weights from memory. If memory cannot deliver them quickly, the expensive processor waits.

HBM is the answer the industry has settled on for the top end of the market. JEDEC, the memory standards body, publishes each generation's specification, and SK hynix, Samsung and Micron build to it and beyond it. SK hynix has said at its own events this autumn that a design built only from a GPU and HBM is "increasingly unable to meet new requirements," in the words of one of its vice presidents at AI Infra Summit in September 2026. That is a company view, and it comes from a firm that sells alternatives such as high bandwidth flash and processing in memory. It does show that even the main supplier expects HBM to be joined by other memory tiers.

The generations, from the makers' own statements

SK hynix lists six generations in its HBM4 announcement: HBM, HBM2, HBM2E, HBM3, HBM3E and HBM4. The milestones below come from company releases and product pages, so they describe what each maker says it built, not an independent test.

  • First HBM: SK hynix says it released the first HBM in 2013 and is the only company to have developed and supplied every generation from HBM1 to HBM3E (company statement, 26 September 2024).
  • HBM3: Micron's product FAQ describes an HBM cube with a 1,024 bit interface and 32 independent channels.
  • HBM3E: SK hynix delivered 8 high HBM3E to customers in March 2024 and announced volume production of a 12 high, 36 GB version at 9.6 Gb/s per pin on 26 September 2024. Samsung's page lists HBM3E at 24 GB and 36 GB, up to 9.2 Gb/s.
  • HBM4: SK hynix said on 12 September 2025 that it had completed development, with 2,048 I/O terminals, double the previous generation, bandwidth doubled, power efficiency improved by more than 40 percent, and speed above 10 Gb/s against the 8 Gb/s JEDEC standard.

Notice that the vendors are selling HBM4 faster than the base standard. Micron says over 11 Gb/s and over 2.8 TB/s per stack. Samsung says up to 13.0 Gb/s and up to 3,300 GB/s. SK hynix said over 10 Gb/s at development. All are above the 8 Gb/s that SK hynix cites as the JEDEC standard. That is normal in this industry, where the standard sets a floor and the customer, usually a chip designer such as an accelerator maker, asks for more. SK hynix said in its July results that HBM4 "reached customer-required operating speeds," which is the same idea in different words.

Who makes it and where each stands

SK hynix

SK hynix is a South Korean memory maker. By its own account it released the first HBM in 2013, delivered HBM3E to customers from March 2024, and completed HBM4 development in September 2025, using its Advanced MR-MUF stacking process and its 1b nanometre DRAM process. In its second quarter 2026 results (29 July 2026, preliminary and unaudited under Korean accounting rules), the company reported revenue of 79.3187 trillion won, up 51% from the first quarter, and an operating margin of 76%. It said HBM4 mass shipments began in the second quarter and would ramp in the second half, that HBM4E samples had finished shipping in the first half, and that it had signed long term agreements with about 10 customers with more talks under way.

A long term agreement, in this market, is a contract that fixes volumes (and sometimes prices) for more than a year. They matter because they tell you buyers are securing supply early. The release does not give HBM volumes or HBM revenue, so HBM cannot be split from other products using it.

At the Open Compute Project Global Summit in San Jose (12 to 15 October 2026), SK hynix showed HBM4E, HBM4 and HBM3 alongside what it called an NVIDIA Vera Rubin partnership model.

Samsung

Samsung's product page lists HBM3E in 24 GB and 36 GB versions at up to 9.2 Gb/s, and HBM4 at 36 GB, 12 high, up to 13.0 Gb/s, built on its 1c DRAM process with a 4nm logic base die. It claims up to 2.7 times the throughput and up to 40% better power efficiency than the prior generation, based on its own internal testing. The page gives no release dates and says customer qualification timelines "have not been publicly disclosed." Samsung's wider memory results and market position are covered in the post on Korean memory makers and the AI boom.

Micron

Micron's page describes HBM4 as 36 GB, 12 high, with over 11 Gb/s and over 2.8 TB/s per stack, "in high volume production," and says power efficiency is more than 20% better than its HBM3E at the same height. Its 30 September 2026 earnings release reported fiscal fourth quarter revenue of 54.23 billion dollars and 133.19 billion dollars for the full year, against 37.38 billion dollars in fiscal 2025. The release text does not break out HBM or DRAM revenue, so the HBM part of that growth is not public from this release.

Why supply is called tight

Several separate pressures overlap.

The first is demand. TrendForce, an analyst firm, estimated on 14 October 2026 that nine large cloud companies would spend about 957 billion dollars in 2026, up 106%, and more than 1.5 trillion dollars in 2027, up 60%. It expects AI server shipments to rise 32.2% in 2026 and nearly 36% in 2027. These are projections, and TrendForce revised its 2027 figure upward from 50% growth, which tells you how fast views are moving.

The second is how HBM is made. An HBM stack takes more silicon than ordinary memory for the same number of bits, and TrendForce said on 8 October 2026 that DRAM supply is expected to stay tight in 2027 because AI servers are absorbing advanced process capacity. When factories make HBM, they make less of other memory, so prices for ordinary DRAM rise too. TrendForce's example: for a mainstream 900 dollar notebook, the processor, DRAM and SSD made up about 68% of parts cost in the third quarter of 2026.

The third is lead time. New memory factories take years. SK hynix's July release said its M15X plant was being accelerated and that the first phase of its Yongin cleanroom opens in early 2027, while other projects would proceed "in phases based on demand and investment efficiency." That wording points to caution, not a rush.

The fourth is prepayment. TrendForce noted that some component suppliers now require advance payments, which pulls cash spending forward. Dell'Oro reported on 16 September 2026 that rising memory and storage prices "significantly increased server average selling prices," and it said supply constraints could slow deployments.

How a new HBM generation reaches a rack

A new generation does not simply appear. The standards body publishes a specification. Each memory maker builds samples and sends them to the chip designer, who tests them with its own processor. Only after that testing, usually called qualification, do large volume orders start. Then the stacks must be attached to the processor in a packaging step, and the finished accelerators are built into servers and racks. Any slow step delays everything after it.

That sequence is why wording in company statements matters. "Sample shipments" means customers are testing. "Mass shipments" means volume orders are flowing. SK hynix used both in its July release: HBM4E sample shipments finished in the first half, while HBM4 mass shipments began in the second quarter. Samsung's page, by contrast, says qualification timelines are not public, so a reader cannot place it on this ladder from that page alone.

It also shows why a new generation does not displace the old one overnight. SK hynix showed HBM3, HBM4 and HBM4E side by side at its October booth, which is a reminder that several generations are in service at the same time, each attached to a different accelerator model.

Why a customer should care even if they never buy a GPU

If your business buys cloud AI services, this chain affects you indirectly. Memory is a large and rising slice of the cost of an AI server, and server cost feeds into what cloud and AI providers charge. If you buy PCs or phones, TrendForce expects DRAM costs to affect notebook prices and shipments in 2027.

For companies planning their own AI capacity, it also explains why contracts look the way they do: multi year commitments, prepayments and allocation. The related posts on Anthropic's compute commitments and OpenAI's compute commitments look at the same pressure from the buyer's side. A wider view of the chips that use this memory is in AI chip market share in 2026.

What is firm and what is uncertain

Firm, because the companies themselves said it:

  • SK hynix began HBM4 mass shipments in the second quarter of 2026 and has long term agreements with about 10 customers.
  • Micron lists HBM4 in high volume production and reported record revenue for the fiscal year ended in September 2026.
  • Samsung lists HBM4 with a 4nm logic base die and claims higher speeds and efficiency than HBM3E, based on its own tests.

Uncertain or unconfirmed:

  • Market share by maker. Published estimates differ by analyst and by quarter. The post on HBM and CoWoS packaging limits and the Korean memory makers post set out the quarterly Counterpoint estimates and where they come from.
  • HBM revenue. None of the company releases cited here gives an HBM only figure.
  • Samsung's qualification and volume status. Its own page says timelines are not public.
  • All SK hynix figures here are preliminary and unaudited, and all forward looking figures are projections.

This post is not investment advice, and nothing here predicts any company's results.

What to watch next

  • Whether Samsung publishes clear HBM4 volume and qualification statements.
  • The next SK hynix and Micron results, and whether HBM4E and later generations stay on schedule.
  • How much of the long term agreement volume covers 2027.
  • Whether alternatives such as high bandwidth flash, which SK hynix showed in September and October 2026, move from demos to products.
  • TrendForce and Dell'Oro revisions to 2027 spending, which shift every demand figure above.

For the open source components in the software you build, Safeguard offers SBOM and dependency scanning, with a free scan.

Quick check

What is HBM in one sentence?

It is a stack of memory chips placed next to an AI processor, connected by a very wide interface so data moves quickly while using less energy per bit.

Who makes HBM?

SK hynix, Samsung and Micron. Each describes HBM4 products on its own pages, though their stages of shipment differ: SK hynix reports mass shipments, Micron says high volume production, and Samsung says qualification timelines are not public.

Does a tight HBM market affect people who never buy AI chips?

Possibly. TrendForce and Dell'Oro both say memory costs are raising server prices, and TrendForce expects DRAM costs to weigh on notebook demand in 2027. These are analyst views, not guarantees.

Sources

Last reviewed: 19 October 2026.

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