Google TPU 8t and 8i explained: training and inference chips

Google's eighth generation tensor processing units come as two chips: the TPU 8t for training AI models and the TPU 8i for running them. Google says both are due to be generally available later in 2026. Its performance claims are company figures that outside testers have not yet checked.

Most people meet Google's chips only as a name in a news story. This post explains what a TPU is, why Google decided to build two different chips this time, what Google has published about each, how it compares with the seventh generation Ironwood, and who has signed up to use them. Every spec below comes from Google's own pages as of 19 October 2026, and anything else is marked as a report or an estimate.

Key numbers at a glance

• TPU 8t superpod size: 9,600 chips, 2 petabytes of shared high bandwidth memory, 121 exaflops of compute (Google blog, Cloud Next 2026).
• TPU 8t versus Ironwood: nearly 3 times the compute performance per pod, double the chip to chip bandwidth (Google blog).
• TPU 8t training target: more than 97 percent "goodput", which is the share of time the cluster does useful work (Google blog).
• TPU 8i memory: 288 GB of high bandwidth memory and 384 MB of on-chip SRAM, which Google says is 3 times the previous generation (Google blog).
• TPU 8i interconnect: 19.2 terabits per second, double the previous generation (Google blog).
• TPU 8i value claim: 80 percent better performance per dollar for inference than the prior generation (Google blog).
• Both chips: up to 2 times better performance per watt than Ironwood (Google blog).
• Virgo Network: connects 134,000 TPU 8t chips in one data center fabric, and more than one million across several sites (Google Cloud blog).
• Ironwood launch: announced 9 April 2025 as Google's first TPU designed for inference, with 42.5 exaflops per 9,216 chip pod and 2 times the performance per watt of the sixth generation Trillium (Google blog).
• Ironwood (TPU7x) per chip: 4,614 teraflops at FP8, 192 GiB of memory, 7,380 GB per second of memory bandwidth, 9,216 chips per pod (Google Cloud documentation).
• Availability: "later this year" on Google's blog, "soon" on the Google Cloud blog, as of 19 October 2026.
• Anthropic: multi gigawatt TPU agreement with Google and Broadcom, capacity from 2027, reported as about 3.5 gigawatts in a Broadcom filing (Data Center Knowledge, 8 April 2026).

What a TPU is, in plain language

A TPU is a processor Google designs for AI work. Most AI chips on the market are GPUs, which started life drawing graphics and turned out to be good at the large grids of multiplication that neural networks need. A TPU is built for that multiplication from the start. It trades flexibility for efficiency, and Google uses it for its own products, including Gemini, and rents it to cloud customers.

Google's Cloud TPU documentation describes the core of the chip as a matrix multiply unit, or MXU, laid out as a 128 by 128 systolic array. A systolic array is a grid of small arithmetic cells that pass numbers to their neighbours in a steady rhythm, so each value is reused many times without a trip back to memory. Code has to be compiled by Google's XLA compiler before it runs on a TPU, and the rest of the program runs on an ordinary host computer attached to the chips.

The same documentation is candid about fit. It says TPUs suit models dominated by matrix math, models that train for weeks or months, large models with large batch sizes, and models with very large embeddings, which are common in ranking and recommendation systems. It says they suit poorly programs with frequent branching, workloads that need high precision arithmetic, and models with custom operations inside the main training loop. In plain terms, a TPU is excellent at the repetitive math at the heart of modern AI and less forgiving of code that does not look like that.

A single chip is never the whole story. AI models today are too large for one chip, so thousands are wired together and act as one machine. Google calls a big block of TPUs a pod, and the 8t's version a superpod. How well the chips talk to each other, and how much memory they share, matters as much as the speed of any single chip.

Google does not necessarily make TPUs entirely alone. Broadcom is named alongside Google in the Anthropic capacity agreement described below, and SiliconANGLE notes that Broadcom also helped Google develop its TPU line. The contract terms between the two are not public.

Why two chips instead of one

Training and inference ask different things of a chip.

Training builds the model. It is a long job that runs on enormous clusters, and what matters is total compute and how many chips can work in step without stalling. One failed chip can slow the whole job, so reliability matters too.

Inference is the model answering a request. It happens at huge volume, one request at a time, and what matters is how fast the answer starts and how much each answer costs. Inference tends to wait on memory more than on arithmetic. A chip that holds more of the model close to the processor, and moves data between chips quickly, can answer sooner.

For the eighth generation Google says it built two chips, because, in its words, agentic workloads and mixture of experts models need very low delay. A mixture of experts model is one that routes each request to a subset of its internal parts instead of using all of them. An agent is an AI system that takes many steps on its own, calling tools and checking results, so each user request can turn into dozens of model calls. That multiplies the demand on inference chips.

TPU 8t: the training chip

Google's blog describes the 8t as aimed at cutting the time to build a leading model from months to weeks. The published figures:

• A superpod holds 9,600 chips and 2 petabytes of shared high bandwidth memory. High bandwidth memory, or HBM, is stacked memory placed right next to the processor. For why it is scarce, see HBM memory and TSMC packaging.
• The superpod delivers 121 exaflops. An exaflop is a billion billion arithmetic operations per second. Google's headline number is measured at FP4, a very low precision number format that trades accuracy for speed, so it is not comparable to figures quoted at higher precision.
• Compute performance per pod is nearly 3 times the previous generation, and chip to chip bandwidth is doubled.
• Storage access is 10 times faster, and a feature called TPUDirect moves data straight into the chip.
• With the Virgo Network and Google's JAX and Pathways software, Google claims close to linear scaling up to one million chips in a single logical cluster. Linear scaling means doubling the chips roughly doubles the speed. This is a design claim, not a published measurement.
• A reliability target of more than 97 percent goodput, supported by live monitoring, rerouting around faulty links, and optical circuit switching, which uses light based switches that can be reconfigured to route around trouble.

The Google Cloud blog adds that Virgo Network has 4 times the bandwidth of earlier fabrics, and that with the 8t it can join 134,000 TPUs in one data center fabric and more than one million TPUs across several sites into a training cluster.

TPU 8i: the inference chip

Google describes the 8i as built for low delay in agent heavy and mixture of experts serving. Published figures:

• 288 GB of HBM and 384 MB of on-chip SRAM. SRAM is a small, very fast memory built into the chip itself. Google says the SRAM figure is three times the previous generation, and the intent is to keep more of the working data on the chip so it does not wait on outside memory.
• Chip to chip bandwidth doubled to 19.2 terabits per second.
• A network layout called Boardfly that Google says cuts the maximum network diameter by more than 50 percent. Diameter here means the longest path a message has to travel between two chips. Four chips form a building block, eight such boards form a group, and 36 groups form a pod.
• A Collectives Acceleration Engine that Google says cuts on-chip delay by up to 5 times. A collective is an operation where many chips share partial results, which happens constantly in large model serving.
• 80 percent better performance per dollar than the prior generation, which Google says lets customers serve nearly twice the volume at the same cost.

Both chips use Google's own Axion Arm based host processors, which Google calls a first for TPUs, and fourth generation liquid cooling. They support JAX, MaxText, PyTorch, SGLang and vLLM, and offer bare metal access. A separate native PyTorch option for TPUs was described as in preview with select customers.

How it compares with Ironwood

Ironwood is the seventh generation, called TPU7x in Google's documentation. Google announced it on 9 April 2025 at Cloud Next 25 and called it "the first Google TPU for the age of inference", so the move toward inference started a generation before the 8i. The launch post claimed 2 times the performance per watt of Trillium, the sixth generation, and nearly 30 times the power efficiency of Google's first Cloud TPU from 2018. It put a full pod at 9,216 liquid cooled chips drawing nearly 10 megawatts and delivering 42.5 exaflops. Google compared that with the El Capitan supercomputer's 1.7 exaflops, but the two figures use different number formats, since supercomputers are usually ranked at 64 bit precision and AI chips at 8 bit or lower, so the comparison says little.

Per chip the documentation lists 4,614 teraflops at FP8 and 2,307 at BF16, 192 GiB of HBM at 7,380 GB per second, and 1,200 GB per second of two way chip to chip bandwidth. A pod holds 9,216 chips, and the documentation says slices, Google's term for a group of connected TPUs used as one, can scale to that size. The launch post gives memory as 192 GB and the documentation as 192 GiB, a small unit difference worth knowing when comparing spec sheets.

Google's comparisons with Ironwood are all relative: up to 2 times the performance per watt for both new chips, nearly 3 times the compute per pod for the 8t, and 80 percent better price performance for the 8i. Google's detailed spec tables comparing the chips are published as images rather than text, so a clean per chip comparison of the 8t and 8i against Ironwood is not given here, and none is guessed. Note also that the 8t superpod figure of 121 exaflops is quoted at FP4, while Ironwood's 42.5 exaflops per pod works out from its FP8 per chip figure, so dividing one by the other does not give a fair speedup.

One more caution. Percent claims depend on the baseline. "Performance per dollar" depends on Google's internal cost, which Google does not publish, so it tells you what Google expects customers to pay relative to the old generation. Treat it as a claim until customers or benchmarks confirm it.

How rivals frame it

Rivals make their own claims. Microsoft says Maia 200 has FP8 performance above Google's seventh generation TPU, and three times the FP4 performance of Amazon's third generation Trainium (Microsoft blog, 26 January 2026). Those are vendor to vendor comparisons made before the 8t and 8i were announced. They do not tell you how Maia compares with the new Google chips, and no independent test of either company's claims had been published as of 19 October 2026. See Trainium, Maia and Jalapeño compared for the other cloud chips.

Google also sells Nvidia hardware. The same Cloud Next announcements say Google will be among the first to offer instances built on Nvidia's Vera Rubin NVL72 systems when they become available later in 2026. So a Google Cloud customer can often pick TPUs or Nvidia GPUs. See AI chip market share 2026 for how the two sides compare in dollars and units.

Who is using TPUs

Google's page names Citadel Securities as an organisation choosing TPUs, and says TPUs have powered Gemini. Anthropic is the other big name. In April 2026 it announced a multi gigawatt TPU agreement with Google and Broadcom, mostly in the United States, with new capacity starting in 2027. Data Center Knowledge reported that a Broadcom filing put this at about 3.5 gigawatts, that IDC's Dave McCarthy said Anthropic was preparing for a wave of agentic inference, and that Amazon remains its primary partner. It also relayed Anthropic's statement of a run rate above $30 billion, which the outlet notes was not independently verified. For the money and contract terms, see Anthropic's compute commitments explained.

What is firm and what is uncertain

Firm, because Google published it:

• The architecture facts: 9,600 chips and 2 PB of memory per 8t superpod, 288 GB and 384 MB on the 8i, 19.2 terabits per second.
• The existence of two chips with different jobs.
• Ironwood's per chip specs in Google's documentation.

Uncertain:

• Every performance and price claim. They are Google's, relative to its own prior chip.
• Availability. Two Google pages use different wording ("later this year" and "soon"), and Google had not published prices or a region list as of 19 October 2026.
• Million chip scaling, which is a design target.
• Real world cost of running on TPUs versus other chips, which depends on the model, the software and the contract.

What to watch next

• General availability of TPU 8t and 8i, and the first regions and prices.
• Independent benchmarks that compare the 8i with Nvidia and other inference chips on the same model.
• Whether Anthropic's capacity starting in 2027 uses the eighth generation or something later. Neither company has said.
• Supply: every chip here needs HBM and advanced packaging, and both are tight.

Safeguard offers SBOM and dependency scanning and a free scan at gold.safeguard.sh/scan for the software teams run on any of these chips.

Quick check

Sources

• Google, Our eighth generation TPUs: https://blog.google/innovation-and-ai/infrastructure-and-cloud/google-cloud/eighth-generation-tpu-agentic-era/
• Google Cloud, AI infrastructure at Next 26: https://cloud.google.com/blog/products/compute/ai-infrastructure-at-next26
• Google Cloud documentation, TPU7x (Ironwood): https://docs.cloud.google.com/tpu/docs/tpu7x
• Microsoft, Maia 200: https://blogs.microsoft.com/blog/2026/01/26/maia-200/
• Google, Ironwood: the first Google TPU for the age of inference (9 April 2025): https://blog.google/products/google-cloud/ironwood-tpu-age-of-inference/
• Google Cloud documentation, Introduction to Cloud TPU: https://docs.cloud.google.com/tpu/docs/intro-to-tpu
• Data Center Knowledge, Anthropic TPU deal (8 April 2026): https://www.datacenterknowledge.com/data-center-chips/anthropic-secures-multi-gigawatt-tpu-deal-with-google-broadcom

Last reviewed: 19 October 2026.