CWE-1342 describes a processor that does not clear microarchitectural state after incorrect microcode assists or speculative execution, so transient execution leaves information exposed.
How it happens
In many processors, an exception, mis-speculation or microcode assist triggers a flush that clears results no longer needed, so they do not affect state that software can see. But traces of that transient execution may remain in microarchitectural buffers. An attacker using side channel analysis can read sensitive information from the changed state.
MITRE cites Load Value Injection (LVI), which can inject erroneous values into intermediate load and store buffers. Several conditions have to be met: transient execution leaves sensitive data behind, the attacker can provoke microarchitectural exceptions, and exploitable operations and structures exist in victim code.
The record lists CVE-2020-0551, load value injection in some processors using speculative execution, which may allow an authenticated local user to cause information disclosure through a side channel.
What an attacker gains
Confidentiality and integrity: reading memory, modifying memory and, in some cases, executing unauthorized code or commands.
How to find it
The record lists no detection methods. For software teams, the practical check is whether your platform vendors have published mitigations for known transient execution issues and whether they are applied to your hosts.
How to fix it
- At architecture and requirements time, hardware should ensure no illegal data flows from faulting micro-ops at the microarchitectural level. MITRE rates this high and expects it to fully address known weaknesses with limited performance impact.
- At build and compile time, include instructions that explicitly remove traces of unneeded computation, for example lfence, sfence, mfence and clflush. This forces each memory access to complete before the next operation, rated high, with potentially large performance impact.
Quick check
Which fix has a performance cost?
The software approach of inserting fence and flush instructions, which MITRE says may have a large performance impact. The hardware fix is expected to have limited impact.
